The current generation of commercially available scanning probe microscopes and profilometers routinely generate sub-nanometer precision height readings as a function of the lateral position on solid surfaces. Calibration methods used for devices, such as scanning probe microscopes, are known in the art and some of which are disclosed in U.S. Pat. Nos. 5,599,464; 5,955,654; and 5,960,255, all of which are herein incorporated by reference.
While the level of quantitative two or three-dimensional topographic information related to scanning probe microscopes may be critical to modern manufacturing quality control or to leading-edge research, the ideal step-height calibration artifact (herein also called a device) for measurement confidence from multiple nanometers down to the one nanometer level and below has not, from our understanding, previously been commercially available.
Step-height calibration artifacts have miniature size dimensions that are similar to microcircuit chips yielded by the semiconductor art. Some of these, including this invention, are related to the controlled growth of crystalline surfaces and crystal films.
Silicon carbide crystals exist in hexagonal, rhombohedral and cubic crystal structures. Generally, the cubic structure, with the zincblende structure, is referred to as βM-SiC or 3C-SiC, whereas numerous polytypes of the hexagonal and rhombohedral structures are collectively referred to as α-SiC. To our knowledge, only bulk (i.e., large) crystals of the α polytypes have been grown to date: the β (or 3C) polytype can only be obtained as small (less than 1 cm2 in area) blocky crystals or thick epitaxial films on small 3C substrates or crystal films grown heteroepitaxially on some other substrate. The most commonly available α-Sic polytypes are 4H-SiC and 6H-SiC; these are commercially available as polished wafers, presently up to 75 mm in diameter.
Silicon carbide polytypes are formed by the stacking of double layers of Si and C atoms. Each double layer may be situated in one of three positions known as A, B, and C. The sequence of stacking determines the particular polytype; for example, the repeat sequence for 3C is: ABCABC . . . (or ACBACB . . . ) the repeat sequence for 4H is ABACABAC, and the repeat sequence for 6H is ABCACBABCACB. From this it can be seen that the number in the polytype designation gives the number of double layers in the repeat sequence and the letter denotes the structure type (cubic, hexagonal, or rhombohedral). The stacking direction is designated as the crystal c-axis and is in the crystal <0001> direction; it is perpendicular to the basal plane, which is the crystal (0001) plane. The (111) planes of the cubic structure are equivalent to the (0001) plane of the α polytypes. The SiC polytypes are polar in the <0001> directions; in one direction, the crystal face is terminated with silicon (Si) atoms; in the other direction, the crystal face is terminated with carbon (C) atoms. These two faces of the (0001) plane are known as the Si-face and C-face, respectively. As used herein, “basal plane” shall refer to either the (0001) plane for a α-SiC, or the (111) plane of 3C-SiC. The term “basal plane” shall also refer herein to any (111) plane in any cubic single-crystal material with tetrahedral bonding known in the art. Examples of such material are silicon (Si) and gallium arsenide (GaAs). Further details related to tetrahedral bonding are disclosed in U.S. patent application Ser. No. 09/965,250 now U.S. Pat. No. 6,488,771 issued Dec. 3, 2002 and herein incorporated by reference. The term “vicinal (0001) wafer” is used herein for wafers whose polished surface (the growth surface) is misoriented less than 100 from the basal plane. The angle of misorientation shall be referred to herein as the tilt angle. The term “homoepitaxial” shall be referred to herein as epitaxial growth, whereby the film and the substrate (wafer) are of the same polytype and material, and the term “heteroepitaxial” shall be referred to herein as epitaxial growth whereby the film is of a different polytype or material than the substrate. The term “bilayer” shall be referred to herein as a layer parallel to a basal plane consisting of two tightly bonded monolayers of atoms. Specifically, each atom within a given monolayer of the bilayer has three bonds to atoms in the other monolayer within the same bilayer. The term “mesa” is meant to represent an isolated growth region that extends above the surrounding surface, and has a top planar surface (neglecting atomic-scale steps that may be in the top surface).
Theories explaining epitaxial single-crystal growth are well known. Crystal growth can take place by several mechanisms. Two of these are: (1) growth can take place by the lateral growth of existing atomic-scale steps on the surface of a substrate and (2) growth can take place by the formation of two-dimensional atomic-scale nuclei on the surface followed by lateral growth from the steps formed by the nuclei. The lateral growth from steps is sometimes referred to as “step-flow growth.” In the first mechanism, growth proceeds by step-flow from existing steps without the formation of any two-dimensional nuclei (i.e., without 2D nucleation). In the nucleation mechanism, the nucleus must reach a critical size in order to be stable. Contamination or defects on the substrate surface can become nucleation sites. In the processes described in U.S. Pat. Nos. 5,915,194 and 6,165,874, crystal growth proceeds by (1) step flow without 2D nucleation or by (2) step-flow with 2D nucleation. Step-flow growth with 2D nucleation allows the growth of epitaxial films of any desired thickness. The reverse of step-flow growth is the lateral etching of steps on a surface; this is known as step-flow etching. The term “atomically-flat” is known in the art and is generally referred to herein as meaning a surface that is totally without any atomic-scale or macro-scale steps over an area defined by selected boundaries that may be created by trenches in a manner to be further described with reference to FIG. 3. Note that the term does not preclude point defects (e.g. lack of a single atom) within the surface. Further, as used herein, an artifact used as a dimensional reference standard is a physical object which is precisely sized in at least one direction such that the known dimension of the artifact can be used to calibrate measuring instruments.
Ideally, a step height reference standard artifact, produced by semiconductor etching/deposition techniques, or other techniques, would be reproducible and robust in use, dimensionally stable, and durable. For maximum reproducibility and utility near the one nanometer step height level, the defining plateaus associated with steps of the artifact should be parallel and atomically-flat. The step-height reference should also have a well established value, fixed ideally by fundamental material physical properties, rather than by a transfer calibration procedure, which may be difficult at the one nanometer level or may only yield (laterally) averaged step-heights. Naturally occurring single crystal low-index plane individual steps might offer intrepid researchers a calibration artifact. Typically, however, these require careful location and preservation, so generally are considered less desirable as a commercial step-height reference standard than other approaches.
The following is a discussion of terms used to describe steps in the prior art and in the present invention that may be further described with reference to FIG. 1, which is composed of FIGS. 1A, 1B, 1C and 1D. FIG. 1A is a schematic of a common step structure 10 and can be used to define some terms used herein to describe components of steps. Referring to FIG. 1A, the part of a step that is a flat horizontal surface shall be called the terrace or plateau 12. The part of a step that is the vertical surface separating two successive terraces shall be called the riser 14. The minimum vertical distance between two successive terraces shall be called the height 16 of the step. The minimum horizontal distance between two successive risers of a series of steps shall be called the width 18 of the step. The maximum distance along the outside edge formed by the riser and terrace shall be called the length 20 of the step. The top of the riser 14 and the outer edge of the terrace or plateau is shown in FIG. 1A as step edge 22.
The following is a discussion of step structures that are used either in prior art or in the present invention. Referring to FIG. 1, FIG. 1B is a cross-sectional view of a common step structure used in commercial step-height calibration artifacts. Herein, this structure shall be called the square wave step structure 10A. FIG. 1C is a cross-section view of a step structure which, herein shall be called a saw tooth step structure 10B. FIG. 1D is a cross-sectional view of a step structure herein called a pyramidal step structure 10C. For the pyramidal structure, the structure will exhibit the pattern shown in FIG. 1D for two cross-sectional views at right angle angles to each other. Hence, this structure has a maximum height in the middle of the structure.
One current type of step-height standard is fabricated by etching/deposition processes resulting in some undesired roughness, such as the intrinsic surface roughness of a native silicon oxide more fully described, for example, in two (2) U.S. Pat. Nos. 5,955,654; and 5,599,464, as well as in the technical brochure of Silicon MDT Ltd., POB 50,103305, made available in Moscow, Russia and represented by K-TEK International, Inc., of Portland, Oreg. Further, the intrinsic surface roughness of a deposited polycrystalline metal film is found in the product literature of VLSI Standards, Inc., of San Jose, Calif. and MCNC, of Research Triangle Park, North Carolina. This intrinsic surface roughness would make difficult the production of a reference step-height on the same vertical (height) size scale as the surface roughness value of the deposited material. Therefore, commercially available manufactured step-height standards typically offer step heights no smaller than 10 to 20 nm. In other cases, such as in U.S. Pat. Nos. 5,960,255 and 6,028,008, the etching/deposition processes result in films or structures that may or may not be adequately uniform or that have dimensions that may vary with processing parameters, leading to calibration transfer questions to be addressed before relying on these artifacts.
Another type of step-height standard in the form of a physical artifact, currently available, uses etched steps over a large area single crystal (i.e., silicon, or virtually any large area single crystal, including silicon carbide). A problem experienced by such an artifact is that the quality and direction of such steps is dependent on (1) the prior treatment of the surface of the single crystal substrate being used, and (2) the quality of the single crystal substrate itself. If the surface is not properly prepared, the direction of the steps will change with the location on the surface. In the case of an artifact fabricated on a surface of silicon that is slightly off-axis from the (111) crystallographic plane, the step-height is limited to the height of a single bilayer.
Artifacts possessing these features are somewhat described in the technical article of M. Suzuki et al, entitled “Standardized Procedure for Calibrating Height Scales in Atomic Force Microscopy on the order of 1 nm”, published in Journal of Vacuum Science & Technology A, Vol. 14, No. 3, pp. 1228-1232 (1996).
Artifacts fabricated on a surface of SiC that is slightly off-axis from the crystallographic basal plane have significant advantages over silicon artifacts. Silicon carbide is much harder and much more chemically inert than silicon so SiC artifacts are more durable than silicon artifacts. For example, the surface of silicon is well known to rapidly form a native oxide layer when exposed to air, whereas oxidation rates for SiC are many times smaller. Furthermore, SiC steps greater in height than a single bilayer can be produced.
SiC artifacts have serious problems that are unique to SiC. Commercially available single-crystal SiC substrates contain a high density of defects, such as screw dislocations, that impact the quality, reproducibility and utility of the step pattern. For example, the orderly formation of steps on a SiC surface (slightly off-axis from the basal plane) by a step flow process (either by etching or growth) is often disturbed in the vicinity of defects. This prevents the controlled production of ordered steps uniformly across a SiC surface. Also, the defects can promote a process known as step bunching to occur in an uncontrolled manner to form undesired varying step-heights.
Current commercially available NIST (National Institute of Standards and Technology) traceable step-height reference grid samples extend from above 100 nm in height down to nominally 18 nm. For the smallest currently available NIST traceable step-height standards, a platinum coating is evaporated onto a silicon dioxide or quartz surface that has been processed to contain the desired step pattern. The platinum coating provides conductivity, giving a surface finish which is that of a deposited metal (Pt) film. Because the step height can vary from sample to sample as the deposition or step production process can vary over time, NIST traceability is individually established for each step-height reference artifact. From our understanding, there exists currently no commercially (or generally) available step-height reference useful for SPM calibration covering the range from 10 nm down to about 1 nm, whether NIST traceable or not. One current practice using an evaporated platinum coating introduces an inherent surface roughness, typically on the order of at least 1 nm for nominally 40 nm thick platinum films limiting its usage for an artifact for SPM calibration procedures. Accordingly, it is desired to provide a method that is particularly suited for forming an artifact that may be employed for SPM calibration procedures and has the feature of precisely controlled plateau height variations which, in turn, provides for a controlled pattern of steps of crystallographically determined height for the standard reference artifact. Because such an artifact would be much more accurately and easily reproducible, the need for each artifact to be individually calibrated and traced can be eliminated or greatly simplified.